Power semiconductor devices and other integrated circuit devices which dissipate high power, or are used in high frequency telecommunications, have been prepared in the past using an exposure to the ambient of part of their leadframe to dissipate heat produced by the devices, and to provide electrical RF ground for the device. One such approach is described in U.S. Pat. No. 5,594,234, dated Jan. 14, 1997, to which this invention is related. Semiconductor devices produced with this known technology are typically based on leadframes which include a first plurality of segments in a first horizontal plane and a chip mount pad in a second horizontal plane such that the distance between these two planes is relatively short and can be bridged by a second plurality of segments without difficulty. Due to the inherent characteristics of the leadframe materials, especially their tolerance for stretching, this distance has been so short, or under such shallow angle that semiconductor devices with exposed chip mount pads produced by known technology are restricted to low profile packages (thickness 1.0 mm or less). On the other hand, standard thickness packages, standard small-outline wide-body packages, and PowerPAD.TM. devices are routinely required in electronics equipment and applications. In addition, many applications ask for low-profile packages with minimum area requirements, but exposed leadframe. These demands cannot be satisfied by known technology.